![]() Refer to the FAQ section of this community post and the txt file found in the JTAG archive file for instructions. If a different UART port for the serial console has been chosen than used on the NXP development tool (EVK, SABRE) specific commands can be added to the DDR initialization script that allows you to configure for the specific UART and then load and run the elf executable. The DDR Stress Tester executable (starting with V2.20) has an auto UART detection feature.This is also true if converting from a RealView Ice (.inc) format to a DS-5 DSTREAM (.ds) format and vice versa. For other debuggers, the user will have to modify the script's command syntax for their specific debugger. Note that the scripts are available either in the RealView ICE format (.inc file) or the DS-5 DSTERAM format (.ds).Refer to the GUI tool description above for the location of the example scripts (which are found in the ddr_stress_tester_vX.xx.zip file). As with the GUI tool, the JTAG/debugger option will first need to run a DDR initialization script for the specified i.MX SoC.Archive file: ddr_stress_tester_jtag_vX.xx.zip.Results are shown on the UART serial port (115200-8-n-1). Option 2 DDR Stress Tester: JTAG InterfaceĪ hardware debugger connected to the board via the JTAG interface is used to download an elf file into the i.MX SoC OCRAM (internal RAM) and then begin execution. Note, these scripts may need to be modified for your custom board and memory. Example initialization scripts based on NXP's development boards can be found in this zip file under the script folder. The tool will first need to run a DDR initialization script for the specified i.MX SoC (refer to Load Init Script in the GUI tool).Run the GUI executable and connect your board to the host PC via USB The following is a high-level overview of each option along with the naming convention of the associated zip file: Each of these options are provided in the attached zip files. There are three options to run the DDR Stress test. DDR Register Programming Aid (RPA): i.MX 6/7 Series DDR Tool Release.The i.MX 6/7 series DDR Tools consist of: Once the OS is brought up, it is recommended to run an OS-based memory test (like Linux memtester) to further verify and test the DDR memory interface. This process equips the user to then proceed with the bring-up of a boot loader and an OS. The purpose of the i.MX 6/7 series DDR Tools is to enable users to generate and test a custom DRAM initialization based on their device configuration (density, number of chip selects, etc.) and board layout (data bus bit swizzling, etc.). MX7D – when selected, this supports both i.MX 7D and i.MX 7S. ![]() MX6ULL – when selected, this supports both i.MX 6ULL and i.MX6 ULZ.MX6DL – when selected, this supports both i.MX 6DL and i.MX 6S (i.MX 6DLS family).MX6DQ – when selected, this supports both i.MX 6DQ and i.MX 6DQP (Plus).Note that the DDR Stress test tool supports the all of the above i.MX SoCs, however, some of the supported i.MX SoCs named in the tool support multiple i.MX SoCs as follows: The tool described on this page cover the following i.MX 6/7 series SoCs: It performs write leveling, DQS gating and read/write delay calibration features. The i.MX6/7 DDR Stress Test Tool is a PC-based software to fine-tune DDR parameters and verify the DDR performance on a non-OS, single-task environment(it is a light-weight test tool to test DDR performance). Please note that any private messages or direct emails are not monitored and will not receive a response. Important: If you have any questions or would like to report any issues with the DDR tools or supporting documents please create a support ticket in the i.MX community. ![]()
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